Solar cells and modules are photovoltaic (PV) devices that convert sunlight energy into electrical power. The most common solar cell material is silicon (Si). However, lower cost PV cells may be fabricated using thin film growth techniques that can deposit solar-cell-quality polycrystalline compound absorber materials on large area substrates using low-cost methods.
Group IIB-VIA compound semiconductors comprising some of the Group IIB (Cd, Zn, Hg) and Group VIA (O, S, Se, Te, Po) materials of the periodic table are excellent absorber materials for thin film solar cell structures. Especially CdTe has proved to be a material that can be used in manufacturing high efficiency solar panels at a cost below $1/W.
FIGS. 1A and 1B show the two different device structures employed in CdTe based solar cells. FIG. 1A is a “super-strate” structure, wherein the light enters the device through a transparent sheet that it is fabricated on. FIG. 1B depicts a “sub-strate” structure, wherein the light enters the device through a transparent conductive layer deposited over the CdTe absorber which is grown over a substrate.
In fabricating the “super-strate” structure 10 of FIG. 1A, a transparent conductive layer (TCL) 12 is first deposited on a transparent sheet 11. Then a junction partner layer 13 is deposited over the TCL 12. A CdTe absorber film 14 is formed on the junction partner layer 13. Then an ohmic contact layer 15 is deposited on the CdTe absorber film 14, completing the solar cell. As shown by arrows 18 in FIG. 1A, light enters this device through the transparent sheet 11. In the “super-strate” structure 10 of FIG. 1A, the transparent sheet 11 may be glass or a high temperature material (e.g. high temperature polymer such as polyimide) that has high optical transmission (such as higher than 80%) in the visible spectra of the sun light. The TCL 12 is usually a transparent conductive oxide (TCO) layer comprising any one of tin-oxide, cadmium-tin-oxide, zinc-tin-oxide, indium-tin-oxide, and zinc-oxide which may be doped to increase their conductivity. Multi layers of these TCO materials as well as their alloys or mixtures may also be utilized in the TCL 12. The junction partner layer 13 is typically a CdS layer. The ohmic contact 15 is made of a highly conductive metal such as C, Mo, Ni, Cr, their nitrides or a doped transparent conductive oxide. The rectifying junction, which is the hearth of this device, is located near the interface 19 between the CdTe absorber film 14 and the junction partner layer 13.
In the “sub-strate” structure 17 of FIG. 1B, the ohmic contact layer 15 is first deposited on a sheet substrate 16, and then the CdTe absorber film 14 is formed on the ohmic contact layer 15. This is followed by the deposition of the junction partner layer 13 and the transparent conductive layer (TCL) 12 over the CdTe absorber film 14. As shown by arrows 18 in FIG. 1B, light enters this device through the TCL 12. There may also be finger patterns (not shown) on the TCL 12 to lower the series resistance of the solar cell. The sheet substrate 16 does not have to be transparent in this case. Therefore, the sheet substrate 16 may comprise a sheet or foil of metal, glass or polymeric material.
The CdTe absorber film 14 of FIGS. 1A and 1B may be formed using a variety of methods. For example, U.S. Pat. No. 4,388,483 granted to B. M. Basol et al., describes the fabrication of a CdS/CdTe solar cell wherein the thin CdTe film is obtained by a cathodic compound electrodeposition technique at low electrolyte temperatures, and then the as-deposited n-type CdTe film is type-converted to p-type through a high temperature annealing step to form the rectifying junction with the underlying CdS layer. The compound electrodeposition or electroplating technique typically uses acidic aqueous electrolytes and forms high quality rectifying junctions after the type-conversion step yielding high quality solar cells and modules with conversion efficiencies exceeding 10% (D. Cunningham et al, “CdTe PV module manufacturing at BP solar”, Progress in Photovoltaics, vol. 10, p. 159 (2002)).
An alternative approach to CdTe formation is physical vapor deposition (PVD), which may be a close-spaced-sublimation method or a vapor transport method. In this technique CdTe granules are vaporized at high temperatures (>600° C.) in a source, and the vapors obtained this way are directed towards a surface of a base, where they condense and form a CdTe layer. The base is typically kept at elevated temperatures of over 500° C. during this process and the surface of the base on which the CdTe layer is deposited comprises a junction partner layer such as a CdS layer. The deposition rate is very high in these methods reaching and even exceeding the level of 1 micron/minute. However, these high temperature methods use large amount of electricity and efficient solar cell fabrication requires use of a thicker CdTe layer (typically a thickness of larger than 3 microns) compared to the electrodeposition technique. In fact, the highest efficiency solar cell, which was fabricated using a PVD method, had a CdTe thickness of larger than 5 microns.
In yet another approach, which is called the “two-stage” approach, a CdTe layer may be formed by first depositing a precursor layer on a base, and then by annealing or reacting this precursor layer to form a crystallized CdTe compound layer, which is polycrystalline in nature. For example, screen printing or ink deposition techniques may be used to deposit pastes or inks, comprising Cd and Te nano-particles or CdTe nano-particles, on CdS coated substrates in the form of a precursor layer. This precursor layer is porous and since it is not a well fused CdTe compound film with good grain structure, it cannot be used for making a solar cell in its as-deposited form. In the second stage of the process, the precursor layer is heated up to elevated temperatures to promote a reaction between the Cd and Te particle species or to promote sintering and grain growth between the CdTe particles within the precursor layer. Cadmium chloride (CdCl2) is often used as a sintering agent to enhance grain growth during or after this annealing or sintering step. As a further example of prior art two-stage techniques, U.S. Pat. No. 4,950,615 discloses a method involving electrodeposition of a Te layer on the surface of a CdS film, followed by electrodeposition of a Cd layer on the Te layer surface during the first stage of the process. During the second stage, the two layers are heated up and reacted to obtain CdTe and form a CdTe/CdS rectifying junction.
FIG. 2 depicts the first general step of an exemplary prior art “two-stage” process wherein a granular precursor layer 20 comprising particles is deposited on the junction partner layer 13 such as a CdS layer to form a stack 21. As reviewed above, the prior art precursor layers may contain one of; i) a mixture of Cd and Te nano-particles, ii) CdTe nano-particles, and, iii) a Te/Cd stack comprising a Te layer and a Cd layer. During the second stage of the process, the stack 21 is heated up to a temperature of 400-600° C. to convert the granular precursor layer 20 into a fused polycrystalline CdTe layer. As the CdTe layer forms, it also forms the rectifying junction with the junction partner layer 13 at the interface 19 shown in FIG. 1A. One problem faced in two-stage approaches is the fact that the surface of the junction partner layer 13 is exposed to various impurities and fluxing agents (such as CdCl2) present in the granular precursor layer 20 during the second stage of the process as the CdTe compound is formed at high temperature. This deteriorates the quality of the interface 19 by the time the p-type CdTe layer is fully formed and the rectifying junction is established between the CdTe layer and the junction partner layer 13 near the interface 19. A low quality interface 19 lowers the electronic and structural quality of the rectifying junction and therefore, lowers the efficiency of the solar cells, especially lowering their voltage and fill factor values.
As the above review demonstrates, there is a need to develop low cost methods for processing CdTe based solar cells with high quality rectifying junctions. Described embodiments provide an inexpensive method for the formation of thin Group IIB-VIA compound absorbers, and provide methods of processing solar cells using these compound absorber layers.